Takeaways from Gael Fraiteur’s multithreading talk
After watching Gael’s recent SkillsMatter talk on multithreading I’ve put together some notes from a very educational talk: Hardware Cache Hierarchy Four levels of cache L1 (per core) – typically used for instructions L2 (per core) L3 (per die) DRAM (all processors) Data can be cached in multiple caches, and synchronization happens through an …
Takeaways from Gael Fraiteur’s multithreading talk Read More »